The disclosures herein relate generally to silicon integrated circuit chips (IC)s, and more specifically, to multi-layer and multi-chip IC manufacturing and test methodologies.
Modern IC designs contain multiple layers of integration that include semiconductor active devices as well as passive components. Distinct IC chips may stack or attach to each other in a vertical fashion to form a multi-chip stack. The chip stack is a 3 dimensional (3D) package that may require interconnecting through-via structures to pass signals and power through the chip stack. Silicon interposers include IC chips that contain through-via structures.